edk/simulation design mb processor from ISE and simulation uart with mb software xilinx 2013. 3. 13. 22:40 system_stub.vhdsystem_tb.vhdv144_5vsx50t_mp4_v10.vol1.eggv144_5vsx50t_mp4_v10.vol2.eggv144_5vsx50t_mp4_v10.vol3.eggv144_5vsx50t_mp4_v10.vol4.eggv144_5vsx50t_mp4_v10.vol5.eggv144_5vsx50t_mp4_v10.vol6.eggv144_5vsx50t_mp4_v10.vol7.eggv144_5vsx50t_mp4_v10.vol8.eggv144_5vsx50t_mp4_v10.vol9.egg
system_stub.vhd