################################################################ # This is a generated script based on design: design_1 # # Though there are limitations about the generated script, # the main purpose of this utility is to make learning # IP Integrator Tcl commands easier. ################################################################ ################################################################ # Check if script is running in correct Vivado version. ################################################################ set scripts_vivado_version 2015.4 set current_vivado_version [version -short] if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { puts "" puts "ERROR: This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script." return 1 } ################################################################ # START ################################################################ # To test this script, run the following commands from Vivado Tcl console: # source design_1_script.tcl # If you do not already have a project created, # you can create a project using the following command: # create_project project_1 myproj -part xc7a100tcsg324-2 # CHECKING IF PROJECT EXISTS if { [get_projects -quiet] eq "" } { puts "ERROR: Please open or create a project!" return 1 } # CHANGE DESIGN NAME HERE set design_name design_1 # If you do not already have an existing IP Integrator design open, # you can create a design using the following command: # create_bd_design $design_name # Creating design if needed set errMsg "" set nRet 0 set cur_design [current_bd_design -quiet] set list_cells [get_bd_cells -quiet] if { ${design_name} eq "" } { # USE CASES: # 1) Design_name not set set errMsg "ERROR: Please set the variable to a non-empty value." set nRet 1 } elseif { ${cur_design} ne "" && ${list_cells} eq "" } { # USE CASES: # 2): Current design opened AND is empty AND names same. # 3): Current design opened AND is empty AND names diff; design_name NOT in project. # 4): Current design opened AND is empty AND names diff; design_name exists in project. if { $cur_design ne $design_name } { puts "INFO: Changing value of from <$design_name> to <$cur_design> since current design is empty." set design_name [get_property NAME $cur_design] } puts "INFO: Constructing design in IPI design <$cur_design>..." } elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { # USE CASES: # 5) Current design opened AND has components AND same names. set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable to another value." set nRet 1 } elseif { [get_files -quiet ${design_name}.bd] ne "" } { # USE CASES: # 6) Current opened design, has components, but diff names, design_name exists in project. # 7) No opened design, design_name exists in project. set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable to another value." set nRet 2 } else { # USE CASES: # 8) No opened design, design_name not in project. # 9) Current opened design, has components, but diff names, design_name not in project. puts "INFO: Currently there is no design <$design_name> in project, so creating one..." create_bd_design $design_name puts "INFO: Making design <$design_name> as current_bd_design." current_bd_design $design_name } puts "INFO: Currently the variable is equal to \"$design_name\"." if { $nRet != 0 } { puts $errMsg return $nRet } ################################################################## # DESIGN PROCs ################################################################## # Hierarchical cell: microblaze_0_local_memory proc create_hier_cell_microblaze_0_local_memory { parentCell nameHier } { if { $parentCell eq "" || $nameHier eq "" } { puts "ERROR: create_hier_cell_microblaze_0_local_memory() - Empty argument(s)!" return } # Get object for parentCell set parentObj [get_bd_cells $parentCell] if { $parentObj == "" } { puts "ERROR: Unable to find parent cell <$parentCell>!" return } # Make sure parentObj is hier blk set parentType [get_property TYPE $parentObj] if { $parentType ne "hier" } { puts "ERROR: Parent <$parentObj> has TYPE = <$parentType>. Expected to be ." return } # Save current instance; Restore later set oldCurInst [current_bd_instance .] # Set parent object as current current_bd_instance $parentObj # Create cell and set as current instance set hier_obj [create_bd_cell -type hier $nameHier] current_bd_instance $hier_obj # Create interface pins create_bd_intf_pin -mode MirroredMaster -vlnv xilinx.com:interface:lmb_rtl:1.0 DLMB create_bd_intf_pin -mode MirroredMaster -vlnv xilinx.com:interface:lmb_rtl:1.0 ILMB # Create pins create_bd_pin -dir I -type clk LMB_Clk create_bd_pin -dir I -from 0 -to 0 -type rst SYS_Rst # Create instance: dlmb_bram_if_cntlr, and set properties set dlmb_bram_if_cntlr [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_bram_if_cntlr:4.0 dlmb_bram_if_cntlr ] set_property -dict [ list \ CONFIG.C_ECC {0} \ ] $dlmb_bram_if_cntlr # Create instance: dlmb_v10, and set properties set dlmb_v10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_v10:3.0 dlmb_v10 ] # Create instance: ilmb_bram_if_cntlr, and set properties set ilmb_bram_if_cntlr [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_bram_if_cntlr:4.0 ilmb_bram_if_cntlr ] set_property -dict [ list \ CONFIG.C_ECC {0} \ ] $ilmb_bram_if_cntlr # Create instance: ilmb_v10, and set properties set ilmb_v10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_v10:3.0 ilmb_v10 ] # Create instance: lmb_bram, and set properties set lmb_bram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.3 lmb_bram ] set_property -dict [ list \ CONFIG.Memory_Type {True_Dual_Port_RAM} \ CONFIG.use_bram_block {BRAM_Controller} \ ] $lmb_bram # Create interface connections connect_bd_intf_net -intf_net microblaze_0_dlmb [get_bd_intf_pins DLMB] [get_bd_intf_pins dlmb_v10/LMB_M] connect_bd_intf_net -intf_net microblaze_0_dlmb_bus [get_bd_intf_pins dlmb_bram_if_cntlr/SLMB] [get_bd_intf_pins dlmb_v10/LMB_Sl_0] connect_bd_intf_net -intf_net microblaze_0_dlmb_cntlr [get_bd_intf_pins dlmb_bram_if_cntlr/BRAM_PORT] [get_bd_intf_pins lmb_bram/BRAM_PORTA] connect_bd_intf_net -intf_net microblaze_0_ilmb [get_bd_intf_pins ILMB] [get_bd_intf_pins ilmb_v10/LMB_M] connect_bd_intf_net -intf_net microblaze_0_ilmb_bus [get_bd_intf_pins ilmb_bram_if_cntlr/SLMB] [get_bd_intf_pins ilmb_v10/LMB_Sl_0] connect_bd_intf_net -intf_net microblaze_0_ilmb_cntlr [get_bd_intf_pins ilmb_bram_if_cntlr/BRAM_PORT] [get_bd_intf_pins lmb_bram/BRAM_PORTB] # Create port connections connect_bd_net -net SYS_Rst_1 [get_bd_pins SYS_Rst] [get_bd_pins dlmb_bram_if_cntlr/LMB_Rst] [get_bd_pins dlmb_v10/SYS_Rst] [get_bd_pins ilmb_bram_if_cntlr/LMB_Rst] [get_bd_pins ilmb_v10/SYS_Rst] connect_bd_net -net microblaze_0_Clk [get_bd_pins LMB_Clk] [get_bd_pins dlmb_bram_if_cntlr/LMB_Clk] [get_bd_pins dlmb_v10/LMB_Clk] [get_bd_pins ilmb_bram_if_cntlr/LMB_Clk] [get_bd_pins ilmb_v10/LMB_Clk] # Restore current instance current_bd_instance $oldCurInst } # Procedure to create entire design; Provide argument to make # procedure reusable. If parentCell is "", will use root. proc create_root_design { parentCell } { if { $parentCell eq "" } { set parentCell [get_bd_cells /] } # Get object for parentCell set parentObj [get_bd_cells $parentCell] if { $parentObj == "" } { puts "ERROR: Unable to find parent cell <$parentCell>!" return } # Make sure parentObj is hier blk set parentType [get_property TYPE $parentObj] if { $parentType ne "hier" } { puts "ERROR: Parent <$parentObj> has TYPE = <$parentType>. Expected to be ." return } # Save current instance; Restore later set oldCurInst [current_bd_instance .] # Set parent object as current current_bd_instance $parentObj # Create interface ports # Create ports set clk_in1 [ create_bd_port -dir I -type clk clk_in1 ] set ext_reset_in [ create_bd_port -dir I -type rst ext_reset_in ] set gpio_out [ create_bd_port -dir O -from 3 -to 0 gpio_out ] # Create instance: axi_gpio_0, and set properties set axi_gpio_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_gpio_0 ] set_property -dict [ list \ CONFIG.C_GPIO_WIDTH {4} \ ] $axi_gpio_0 # Create instance: clk_wiz_1, and set properties set clk_wiz_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:5.2 clk_wiz_1 ] set_property -dict [ list \ CONFIG.PRIM_SOURCE {Global_buffer} \ CONFIG.USE_RESET {false} \ ] $clk_wiz_1 # Create instance: mdm_1, and set properties set mdm_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:mdm:3.2 mdm_1 ] set_property -dict [ list \ CONFIG.C_USE_UART {1} \ ] $mdm_1 # Create instance: microblaze_0, and set properties set microblaze_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:microblaze:9.5 microblaze_0 ] set_property -dict [ list \ CONFIG.C_DEBUG_ENABLED {1} \ CONFIG.C_D_AXI {1} \ CONFIG.C_D_LMB {1} \ CONFIG.C_I_LMB {1} \ ] $microblaze_0 # Create instance: microblaze_0_axi_periph, and set properties set microblaze_0_axi_periph [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 microblaze_0_axi_periph ] set_property -dict [ list \ CONFIG.NUM_MI {2} \ ] $microblaze_0_axi_periph # Create instance: microblaze_0_local_memory create_hier_cell_microblaze_0_local_memory [current_bd_instance .] microblaze_0_local_memory # Create instance: rst_clk_wiz_1_100M, and set properties set rst_clk_wiz_1_100M [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 rst_clk_wiz_1_100M ] set_property -dict [ list \ CONFIG.C_EXT_RST_WIDTH {1} \ ] $rst_clk_wiz_1_100M # Create interface connections connect_bd_intf_net -intf_net microblaze_0_axi_dp [get_bd_intf_pins microblaze_0/M_AXI_DP] [get_bd_intf_pins microblaze_0_axi_periph/S00_AXI] connect_bd_intf_net -intf_net microblaze_0_axi_periph_M01_AXI [get_bd_intf_pins axi_gpio_0/S_AXI] [get_bd_intf_pins microblaze_0_axi_periph/M01_AXI] connect_bd_intf_net -intf_net microblaze_0_debug [get_bd_intf_pins mdm_1/MBDEBUG_0] [get_bd_intf_pins microblaze_0/DEBUG] connect_bd_intf_net -intf_net microblaze_0_dlmb_1 [get_bd_intf_pins microblaze_0/DLMB] [get_bd_intf_pins microblaze_0_local_memory/DLMB] connect_bd_intf_net -intf_net microblaze_0_ilmb_1 [get_bd_intf_pins microblaze_0/ILMB] [get_bd_intf_pins microblaze_0_local_memory/ILMB] connect_bd_intf_net -intf_net microblaze_0_mdm_axi [get_bd_intf_pins mdm_1/S_AXI] [get_bd_intf_pins microblaze_0_axi_periph/M00_AXI] # Create port connections connect_bd_net -net axi_gpio_0_gpio_io_o [get_bd_ports gpio_out] [get_bd_pins axi_gpio_0/gpio_io_o] connect_bd_net -net clk_in1_1 [get_bd_ports clk_in1] [get_bd_pins clk_wiz_1/clk_in1] connect_bd_net -net clk_wiz_1_locked [get_bd_pins clk_wiz_1/locked] [get_bd_pins rst_clk_wiz_1_100M/dcm_locked] connect_bd_net -net ext_reset_in_1 [get_bd_ports ext_reset_in] [get_bd_pins rst_clk_wiz_1_100M/aux_reset_in] [get_bd_pins rst_clk_wiz_1_100M/ext_reset_in] connect_bd_net -net mdm_1_debug_sys_rst [get_bd_pins mdm_1/Debug_SYS_Rst] [get_bd_pins rst_clk_wiz_1_100M/mb_debug_sys_rst] connect_bd_net -net microblaze_0_Clk [get_bd_pins axi_gpio_0/s_axi_aclk] [get_bd_pins clk_wiz_1/clk_out1] [get_bd_pins mdm_1/S_AXI_ACLK] [get_bd_pins microblaze_0/Clk] [get_bd_pins microblaze_0_axi_periph/ACLK] [get_bd_pins microblaze_0_axi_periph/M00_ACLK] [get_bd_pins microblaze_0_axi_periph/M01_ACLK] [get_bd_pins microblaze_0_axi_periph/S00_ACLK] [get_bd_pins microblaze_0_local_memory/LMB_Clk] [get_bd_pins rst_clk_wiz_1_100M/slowest_sync_clk] connect_bd_net -net rst_clk_wiz_1_100M_bus_struct_reset [get_bd_pins microblaze_0_local_memory/SYS_Rst] [get_bd_pins rst_clk_wiz_1_100M/bus_struct_reset] connect_bd_net -net rst_clk_wiz_1_100M_interconnect_aresetn [get_bd_pins microblaze_0_axi_periph/ARESETN] [get_bd_pins rst_clk_wiz_1_100M/interconnect_aresetn] connect_bd_net -net rst_clk_wiz_1_100M_mb_reset [get_bd_pins microblaze_0/Reset] [get_bd_pins rst_clk_wiz_1_100M/mb_reset] connect_bd_net -net rst_clk_wiz_1_100M_peripheral_aresetn [get_bd_pins axi_gpio_0/s_axi_aresetn] [get_bd_pins mdm_1/S_AXI_ARESETN] [get_bd_pins microblaze_0_axi_periph/M00_ARESETN] [get_bd_pins microblaze_0_axi_periph/M01_ARESETN] [get_bd_pins microblaze_0_axi_periph/S00_ARESETN] [get_bd_pins rst_clk_wiz_1_100M/peripheral_aresetn] # Create address segments create_bd_addr_seg -range 0x10000 -offset 0x40000000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs axi_gpio_0/S_AXI/Reg] SEG_axi_gpio_0_Reg create_bd_addr_seg -range 0x8000 -offset 0x0 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs microblaze_0_local_memory/dlmb_bram_if_cntlr/SLMB/Mem] SEG_dlmb_bram_if_cntlr_Mem create_bd_addr_seg -range 0x8000 -offset 0x0 [get_bd_addr_spaces microblaze_0/Instruction] [get_bd_addr_segs microblaze_0_local_memory/ilmb_bram_if_cntlr/SLMB/Mem] SEG_ilmb_bram_if_cntlr_Mem create_bd_addr_seg -range 0x1000 -offset 0x41400000 [get_bd_addr_spaces microblaze_0/Data] [get_bd_addr_segs mdm_1/S_AXI/Reg] SEG_mdm_1_Reg # Perform GUI Layout regenerate_bd_layout -layout_string { guistr: "# # String gsaved with Nlview 6.5.5 2015-06-26 bk=1.3371 VDI=38 GEI=35 GUI=JA:1.6 # -string -flagsOSRD preplace port clk_in1 -pg 1 -y 310 -defaultsOSRD preplace port ext_reset_in -pg 1 -y 240 -defaultsOSRD preplace portBus gpio_out -pg 1 -y 190 -defaultsOSRD preplace inst microblaze_0_axi_periph -pg 1 -lvl 5 -y 150 -defaultsOSRD preplace inst axi_gpio_0 -pg 1 -lvl 6 -y 180 -defaultsOSRD preplace inst mdm_1 -pg 1 -lvl 3 -y 140 -defaultsOSRD preplace inst microblaze_0 -pg 1 -lvl 4 -y 180 -defaultsOSRD preplace inst rst_clk_wiz_1_100M -pg 1 -lvl 2 -y 260 -defaultsOSRD preplace inst clk_wiz_1 -pg 1 -lvl 1 -y 300 -defaultsOSRD preplace inst microblaze_0_local_memory -pg 1 -lvl 5 -y 380 -defaultsOSRD preplace netloc microblaze_0_mdm_axi 1 2 4 540 10 NJ 10 NJ 10 1620 preplace netloc clk_in1_1 1 0 1 NJ preplace netloc microblaze_0_Clk 1 1 5 180 170 540 210 810 100 1310 460 NJ preplace netloc microblaze_0_ilmb_1 1 4 1 1280 preplace netloc microblaze_0_axi_dp 1 4 1 1290 preplace netloc axi_gpio_0_gpio_io_o 1 6 1 N preplace netloc rst_clk_wiz_1_100M_interconnect_aresetn 1 2 3 NJ 60 NJ 60 NJ preplace netloc rst_clk_wiz_1_100M_bus_struct_reset 1 2 3 NJ 240 NJ 260 1260 preplace netloc microblaze_0_axi_periph_M01_AXI 1 5 1 N preplace netloc ext_reset_in_1 1 0 2 NJ 240 NJ preplace netloc rst_clk_wiz_1_100M_peripheral_aresetn 1 2 4 530 70 NJ 70 1270 290 NJ preplace netloc rst_clk_wiz_1_100M_mb_reset 1 2 2 NJ 220 NJ preplace netloc clk_wiz_1_locked 1 1 1 190 preplace netloc microblaze_0_dlmb_1 1 4 1 1300 preplace netloc microblaze_0_debug 1 3 1 820 preplace netloc mdm_1_debug_sys_rst 1 1 3 200 40 NJ 40 800 levelinfo -pg 1 -10 100 360 670 1040 1470 1750 1890 -top 0 -bot 470 ", } # Restore current instance current_bd_instance $oldCurInst save_bd_design } # End of create_root_design() ################################################################## # MAIN FLOW ################################################################## create_root_design ""