system Project Status (07/02/2013 - 14:43:21)
Project File: v144_z702_npi_v400b.xise Parser Errors: No Errors
Module Name: system Implementation State: Programming File Not Generated
Target Device: xc7z020-1clg484
  • Errors:
 
Product Version:ISE 14.4
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
XPS Reports [-]
Report NameGenerated ErrorsWarningsInfos
Platgen Log Fileȭ 7 2 14:34:51 2013021 Warnings (14 new)14 Infos (4 new)
Simgen Log File    
BitInit Log Fileȭ 7 2 14:43:18 201306 Warnings (4 new)5 Infos (2 new)
System Log File    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrentȭ 7 2 14:42:39 2013
WebTalk Log FileCurrentȭ 7 2 14:42:55 2013

Date Generated: 07/02/2013 - 14:43:21